A decision framework for allocating functions between FPGA logic and embedded software while keeping interfaces, verification and delivery risks visible.
Treat hardware and software as one system
In an FPGA-based product, the most consequential architectural decision is often not which processor or toolchain to use. It is where each function should run. A function placed in programmable logic can gain deterministic parallel execution and low latency, but it becomes more expensive to change and verify. The same function in software may be easier to update and observe but may miss timing, throughput or power constraints.
Hardware-software co-design makes that boundary an explicit engineering decision instead of a late handoff. Teams assess the complete behaviour, partition functions using shared criteria and verify the interface as part of the product. This is especially important when embedded C or C++, Python tooling and VHDL or another hardware description language must evolve together.
The client outcome is a design that meets system constraints without putting every demanding function into hardware or every changeable function into software by habit. The partition should be justified by measurements, written assumptions and a path to revise it while uncertainty remains.